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Agilent Series (Part 1): Anticipate System Level Design Challenges: Bridging Design Domain Gaps

August 2, 2012

The Semiconductor SIG presents…

Agilent Technologies

Agilent Series Part 1 of 3

Today’s mobile communication systems use sophisticated signal processing to achieve high transmission rates. Leading-edge wireless systems must contend with more challenges as designs are expected to be multi-standard and reconfigurable. The complexity of digital signal processing is steadily growing, as it needs to compensate for the signal impairments caused by analog front-end blocks in nanometer process nodes. Systems involving baseband and analog/RF portions have traditionally been designed, simulated and verified separately due to the different mindsets of the engineers and the tools of the two domains. But going forward this approach will become  untenable, and adequate system-level design methodologies are required to find bridge between baseband and RF to deliver adequate performance at minimum cost.

SPEAKER:
Larry Lerner
R&D Senior Manager, Agilent EEsof EDA Division

Larry Lerner is the R&D Senior Manager of Agilent EEsof EDA. Agilent EEsof EDA is the industry leader in high-frequency design software. The organization’s revenue places it in the top 5 EDA companies. Since 2000, Larry has been the R&D Senior Manager of Agilent EEsof, and between 1993-2000, Larry was the R&D Manager for Hewlett Packard EEsof. He was responsible for managing the Device Modeling, RFIC and High Speed Digital Design market segments and integrating several acquisitions into Agilent EEsof business. Larry earned a BSEE from Harvey Mudd College and an MSEE from Stanford University. Larry lives in California with his wife and two children and enjoys cycling, swimming, music and gourmet cooking.


DATE:
August , 2, 2012

TIME:
7:30AM Registration/Networking/Refreshments
8:00AM Program Begins
9:30AM Program Ends

LOCATION:

12531 High Bluff Dr # 100
San Diego, CA 92130

COST:
Pre-Registration: (Please pre-register by noon on 8/1/12)
$10.00 – CommNexus Sponsor***
$20.00 – Non-Sponsor
FREE – Mentor Sponsor**
FREE – Students, Military & Press*

At the Door:
$20.00 – CommNexus Sponsor
$30.00 – Non-Sponsor
FREE – Mentor Sponsor
FREE – Students, Military & Press

CLICK HERE for a list of CommNexus Sponsors

*Student/Military or Press: You must select this option in the payment dropdown to change the balance to $0.
**Mentor Sponsor Company Employees: Make sure your profile reflects the correct company in order to be registered for free.  If the website still charges you, select “Pay At Door” and notify via e-mail: michele@commnexus.org
***All Other Corporate Sponsor Levels: Make sure your profile reflects your correct company in order to be registered for $10.00.  If the website charges you more, select “Pay At Door” and we will charge you $10 at the door.


To register for the next two parts of this series, CLICK BELOW:

 Accelerate 3D-IC integration for RF applications:
More than Moore – a necessity for RF?

(Part 2)

Achieve Hardware Validation
(Part 3)


SIG EVENT SPONSORED BY:


Questions? Contact Brittany Bjerke at bbjerke@commnexus.org

Details

Date:
August 2, 2012
Event Category: